Objective Development Forums

What about using the built-in analog comparator of ATtiny and ATmega controllers for detecting true differential signals on D+ and D- wires?
Of course, this will introduce using additional cycles for detecting single-ended states (so, 12 MHz is not sufficient) and another interrupt pin (or the new edge-interrupt on ATmegaX8) for detecting SOF pulses.
This approach should enhance USB standard compliance.

Note that the analog comparator interrupt can be used for detecting the start of transmission, same as D+ routed to INT0 in earlier designs.

What clock frequency is necessary to check the CRC while receiving?

It may not be fast enough. According to the data sheet the typical propagation delay is 500 ns with VCC 5 V and 750 ns with VCC 2.7V. The bit time of the 1.5 Mbit/s signal is 667 ns.

Only one transistor worked, and it omitted with and a standard voltage was made
resistance division.
A rough voltage is not problem having though the voltage is just good in "3.3/2+0.7"
either.
The clamp voltage is decided by the voltage of LED.

The other is tried in blue LED3.3V, and there seem to be neither
Zenardaiord nor inferiority.
The calculation and resistance are "5V side 27kohm", and "GND side 24
kohm. "

Both tropism conversion I convert a USB level into 5v, and to convert the opposite direction into a USB level.
I simplified it with a transistor as a digital transistor a little.
I added a transistor to blue light-emitting diode (UB1112H) and made a characteristic steep. （It is a voltage source of 2.55v）It is inspection of both tropism.
I work by one circuit, but can distinguish a signal of "D+D-" each if LED 2 has a circuit.

I don't think using the comparator brings an advantage. Signals are usually good enough for direct detection by input ports.

Checking CRC during reception is probably possible at 18 MHz. You need a 256 byte CRC table for that.