Search found 44 matches

by cpldcpu
Wed Jan 22, 2014 5:51 pm
Forum: V-USB
Topic: Minimal USB implementation
Replies: 13
Views: 15535

Re: Minimal USB implementation

That looks like something that would break arbitrarily with new compiler versions :)
by cpldcpu
Wed Jan 22, 2014 5:51 pm
Forum: V-USB
Topic: USBaspLoader condition / BVZ55-C3V6
Replies: 5
Views: 8241

Re: USBaspLoader condition / BVZ55-C3V6

Oh, I agree, that could work. You'd need to activate the pull-up resistors because otherwise the zener diodes may pull the inputs low.
by cpldcpu
Tue Jan 21, 2014 9:53 am
Forum: V-USB
Topic: Does usbPoll() get executed before entry to the ISR?
Replies: 10
Views: 12333

Re: Does usbPoll() get executed before entry to the ISR?

The debounce interval is covered by the code is posted up here: viewtopic.php?f=8&t=8801&sid=166e80c1207f99a9e917f28d23023b3e#p26452

It is not necessary to take care of debouncing in the reset code. The code does exactly what I mentioned.
by cpldcpu
Tue Jan 21, 2014 9:52 am
Forum: V-USB
Topic: Minimal USB implementation
Replies: 13
Views: 15535

Re: Minimal USB implementation

Whenever I tried that, the compiler would also initialize the variables, which took up more space than it saved.
by cpldcpu
Tue Jan 21, 2014 9:51 am
Forum: V-USB
Topic: USBaspLoader condition / BVZ55-C3V6
Replies: 5
Views: 8241

Re: USBaspLoader condition / BVZ55-C3V6

I think for reliable detection of the presence of a USB host you'd have to do this: 0) For enumeration 1) Wait for reset (long SE0). If reset times out, quit bootloader 2) After that, wait for n keepalive pulses (short SE0). If reset times out, quit bootloader All of this will take at least 500ms if...
by cpldcpu
Sun Jan 19, 2014 5:14 pm
Forum: V-USB
Topic: Minimal USB implementation
Replies: 13
Views: 15535

Re: Minimal USB implementation

Actually not so much call overhead, but richer information to the optimizer about exactly what registers are modified. It could probably also be written to let the compiler assign all the registers it uses. I wish I have not found a way to define variables in the assemblercode without having the co...
by cpldcpu
Sat Jan 18, 2014 12:59 pm
Forum: V-USB
Topic: Minimal USB implementation
Replies: 13
Views: 15535

Re: Minimal USB implementation

That is where it is right now. The idea was that inlining saves code space.
by cpldcpu
Sat Jan 18, 2014 12:43 pm
Forum: V-USB
Topic: Does usbPoll() get executed before entry to the ISR?
Replies: 10
Views: 12333

Re: Does usbPoll() get executed before entry to the ISR?

Maybe the image below helps. It shows the USB traffic during device enumeration. "Int active" is high while the interrupt routine is executed, tx during set. If you want to understand the usb protocol, i would recommend you get a logic analyzer with USB protocol support. The saleae support...
by cpldcpu
Sat Jan 18, 2014 9:52 am
Forum: V-USB
Topic: Minimal USB implementation
Replies: 13
Views: 15535

Re: Minimal USB implementation

I tried inlining the crc routine. Unfortunately it only saved two bytes.
by cpldcpu
Sat Jan 18, 2014 6:53 am
Forum: V-USB
Topic: Does usbPoll() get executed before entry to the ISR?
Replies: 10
Views: 12333

Re: Does usbPoll() get executed before entry to the ISR?

It can be a good idea to simulate a device disconnect after program start to force a bus reset. This removes all ambiguity after startup. usbDeviceDisconnect(); /* do this while interrupts are disabled */ _delay_ms(500); usbDeviceConnect(); Otherwise you should be more clear about what you actually ...
by cpldcpu
Sat Jan 18, 2014 6:38 am
Forum: V-USB
Topic: static uchar usbIsReset; /* = 0; USB bus is in reset phase
Replies: 5
Views: 7686

Re: static uchar usbIsReset; /* = 0; USB bus is in reset p

The AVR-LIBC erases the the bss section before entering main. You can actually see it when disassembling: This is just an arbitrary example: >avr-objdump -d -S main.bin >main.lss 000017fa <__do_clear_bss>: 17fa: 20 e0 ldi r18, 0x00 ; 0 17fc: a0 e6 ldi r26, 0x60 ; 96 17fe: b0 e0 ldi r27, 0x00 ; 0 180...
by cpldcpu
Tue Jan 14, 2014 7:28 pm
Forum: V-USB
Topic: Minimal USB implementation
Replies: 13
Views: 15535

Re: Minimal USB implementation

Update: I managed to get it to work on a meager ATtiny10!

>Here was an attempt I made at inlining the CRC routine and communicating what registers it trashed
Excellent idea. In fact I can onto a lot of trouble with registers on the ATiny10. I will look into this.
by cpldcpu
Tue Jan 14, 2014 7:25 pm
Forum: V-USB
Topic: Does usbPoll() get executed before entry to the ISR?
Replies: 10
Views: 12333

Re: Does usbPoll() get executed before entry to the ISR?

>it uses the USB 5V and a low threshold 3.3V regulator Can the Attiny 85 do 12 MHz at 3.3V? I am certain this is out of spec. > is there enough time for usbPoll() to complete execution for the first time before control goes to the ISR? If you clear pending interrupts before the SEI there may be. Oth...
by cpldcpu
Sat Jan 04, 2014 5:16 pm
Forum: V-USB
Topic: Minimal USB implementation
Replies: 13
Views: 15535

Minimal USB implementation

To understand how to optimize the memory footprint of V-USB, I created a small ATtiny85 based device that controls a single WS2812 RGB LED via USB. This is very similar to the Blink[1] and other devices. Current functionality * Enumeration. * Only SETUP-request can be received. * Responses are limit...
by cpldcpu
Sat Dec 14, 2013 1:34 pm
Forum: V-USB
Topic: Clock accuracy limits for 12MHz implementation
Replies: 7
Views: 9186

Re: Clock accuracy limits for 12MHz implementation

I wonder whether it's the send timing that's the problem. The original OSCCAL for 16MHz was 0xA2, and 0x47 was the optimal 12MHz value. Assuming roughly linear steps, that's about 0.044MHz/step (the way OSCCAL overlaps around 0x80 means that the step is larger than this). Two steps break it, which ...